MO401

Computer Architecture I

1S2011

Professor:	Paulo C. Centoducatte	Schedule:	Mondays and Thursdays: 08:00 to 10:00
Sala:	11 - IC-01	Classroom:	CC16 (IC03)
tel:	3521-5886	Project Manager:

OBS .: When sending an email please put in the subject "MO401"

Data	Notice
	Available 0s Concepts
13/07	Provided the Notes of Work 2
10/07	Provided the Notes of exam II
27/06	The texts and presentations related to Work 2 are available here
25/06	Provided the Notes of the first job
09/06	The 30/06/2011 race will take place in room 353 (IC 3 1/2) and will start at 8:30.
02/06	Defined the delivery dates and presentation of the work 2
01/06	Provided the Notes of exam I
04/05	Provided the statement of the second job
02/05	The test of 09/05/2011 will be in room 316 (IC 3) and will start at 8:30.
14/04	1a. race: 09/05/2011
12/04	Car * s, page of work 1 is updated with the data received until today. If you have sent your reservation and it does not appear in the updated list, please send it again (probably your email was lost due to problems with the IC network last weekend ).
04/04	Dear, it was requested to change the date of the 1st. proof for 09/05 (Monday). Please let me know (by sending an email to me) who CANNOT take the test on this new date.
01/04	Special students can now remove the password from their IC account at the Postgraduate Office
28/03	page of first job updated with bookings already processed
21/03	Provided the statement of the first job
04/03	It was not possible to change the class schedule from Thursday to Wednesday, so the next class will be Thursday (10/03/2011)
22/02	Recommended reading: Moore's Law

Review (pipelines, performance, cache and instruction set)

Fundamentals

Parallelism at instruction level (ILP)

Dynamic exploration

Software ILP

Project of Hierarchy of Memories

Multiprocessors and Thread Level Parallelism

Storage Systems

Lessons:

Chapter	Aula	Subject

	1^a.. 2^a.. 3^a.. 4^a..	Review	pdf 6-PDF

1	5^a..	Fundamentals	pdf 6-PDF

2-3	6^a.. 7^a.. 8^a.. 9^a.. 10^a.. 11^a.. 12^a.. 13^a.. 14^a.. 15^a..	Parallelism at instruction level (ILP)	pdf 6-PDF pdf 6-PDF pdf 6-PDF pdf 6-PDF



	20^a..	Exam I	Notes
5	16^a.. 17^a.. 18^a.. 19^a.. 21^a.. 22^a..	Project of Hierarchy of Memories	pdf 6-PDF





4	22^a.. 23^a.. 24^a.. 25^a.. 26^a.. 27^a..	Multiprocessors and Parallelism at Thread Level	pdf 6-PDF
6	27^a.. 28^a.. 29^a.. 30^a..	Storage Systems	pdf 6-PDF
	30/06	Exam II

	Holidays: 05 to 09/03; April 21 to 23; 04/23 to 25/06
	Deadline for compliance with the Time Load: 01/07
	Period for entry of concepts and frequencies: 02 to 18

Textbook:

“Computer Architecture: A Quantitative Approach” - 4th edition; Hennessy & Patterson
“Computer Architecture: A Quantitative Approach” - 3th edition; Hennessy & Patterson

Class notes (transparencies )

Exercises:

It is strongly recommended that the problems encountered at the end of each chapter of the textbook be resolved. A substantial part of the exams will cover them.

(Suggestions):
NOTE: The number of exercises below is that found in
"Computer Architecture: A Quantitative Appoach" - 4rd edition

Chapter 1: 1.12 to 1.14
Chapter 2: 2.1 to 2.7; 2.9; 2.10; 12.11; 12.12 (ab);
Chapter 3:
Chapter 4:
Chapter 5:
Chapter 7:
Chapter 8:
Chapter 6:

-------------------------------------------------- -------------------------------------------------- -------------------------------------------------- -

NOTE: The number of exercises below is that found in
"Computer Architecture: A Quantitative Appoach" - 3rd edition

Chapter 1: 1.1 to 1.4; 1.6; 1.8; 1.10; 1.11; 1.13; 1.14; 1.16 to 1.18 Exercises
Chapter 2: Exercises
Chapter 3: 3.1 to 3.3; 3.5; 3.8; 3.9; 3.14 to 3.17; 3.20; 3.21; 3.28 Exercises
Chapter 4: 4.1; 4.2; 4.4; 4.5; 4.7; 4.12; 4.13; 4.16; 4.17; 4.19; 4.20; 4.23; 4.24 Exercises
Chapter 5: 5.5.1; 5.6; 5.7; 5.13; 5.16 to 5.19 Exercises
Chapter 7: 7.1; 7.3; 7.6 to 7.9; 7.21; 7.24 Exercises
Chapter 8: 8.1 to 8.7; 8.9; 8.10; 8.14; 8.19; 8.31
Chapter 6: 6.1; 6.4; 6.5; 6.10; 6.13; 6.18; 6.20; 6.23 Exercises

-------------------------------------------------- -------------------------------------------------- -------------------------------------------------- -

Suggested Exercises for Review:

(Computer Organization and Design - The Hardware / Software Interface - 3rd. Edition)

Chapter 4 (Performance): 4.1 - 4.3, 4.6 - 4.8, 4.10, 4.12, 4.14, 4.15 Exercises
Chapter 6 (Pipeline): 6.1 - 6.4, 6.14, 6.17 - 6.19, 6.21 - 6.22, 6.33, 6.35 - 6.36 Exercises
Chapter 7 (Memory Hierarchy): 7.1 - 7.5, 7.9 - 7.14, 7.28, 7.32- 7.35 Exercises

The evaluation will be based on two exams and two papers.; Exam I (weight 3): 09/05/2011 - (Grades); Exam II (weight 4): 30/06/2011; Delivery of works: -
Work 1 (weight 1): (weight 1):

Reservation: until 8:00 de 09/04/2011

Delivery: until 8:00 de 23/04/2011

Work 2 (weight 2): Texts and Presentations

Reservation: until

Delivery fee: until 12:00 of 25/06 (text and presentation)

Delivery Review: until 80:00 of 09/07

Presentations: 27/06; 04/07 and 07/07

27 / 06: G02; G05; G04; G09; G11

04 / 07: G06; G07; G12; G08

07 / 07: G01; G10; G03; G13

(Jun 02, 2011)

MO401

Computer Architecture I

1S2011

Program:

Textbook:

“Computer Architecture: A Quantitative Approach” - 4th edition; Hennessy & Patterson

“Computer Architecture: A Quantitative Approach” - 3th edition; Hennessy & Patterson

Class notes (transparencies )

Recommended Reading:

G. MOORE, "Cramming More Components onto Integrated Circuits", Electronics,
p114-117, April 1965. (Reprinted at: Proc. of the IEEE, vol 86, no. 1)

Exercises:

It is strongly recommended that the problems encountered at the end of each chapter of the textbook be resolved. A substantial part of the exams will cover them.

Suggested Exercises for Review:

(Computer Organization and Design - The Hardware / Software Interface - 3rd. Edition)

Rating:

Exams:

MO401

Computer Architecture I

1S2011

Program:

Textbook:

“Computer Architecture: A Quantitative Approach” - 4th edition; Hennessy & Patterson

“Computer Architecture: A Quantitative Approach” - 3th edition; Hennessy & Patterson

Class notes (transparencies)

Recommended Reading:

G. MOORE, "Cramming More Components onto Integrated Circuits", Electronics, p114-117, April 1965. (Reprinted at: Proc. of the IEEE, vol 86, no. 1)

Exercises:

It is strongly recommended that the problems encountered at the end of each chapter of the textbook be resolved. A substantial part of the exams will cover them.

Suggested Exercises for Review:

(Computer Organization and Design - The Hardware / Software Interface - 3rd. Edition)

Rating:

Exams:

Class notes (transparencies )

G. MOORE, "Cramming More Components onto Integrated Circuits", Electronics,
p114-117, April 1965. (Reprinted at: Proc. of the IEEE, vol 86, no. 1)