MO401

Computer Architecture I

1S2009

Professor:	Paulo C. Centoducatte	Schedule:	Tuesdays and Thursdays: 08:00 to 10:00
Sala:	11 - IC-01	Classroom:	316 - IC03
tel:	3521-5886	Project Manager:

OBS .: When sending an email please put in the subject "MO401"

Data	Notice
17/07	Provided the note of work 2 and final concept
11/07	Provided the note of Exam 2
28/06	Provided the note of Work1
26/06	New delivery dates for Paper 2 and Exam 2
24/06	Yesterday's Faculty Assembly (23/06/2009) defined the return to classes. So tomorrow (25/06/2009) there will be class and we will discuss the dates of the scheduled activities there.
	Due to the Teachers having defined by the STRIKE in their last assembly there will be no classes until the end of the strike is defined.
04/06	Work page 2 updated with information about the revision
01/06	Due to the paralysis of the Professors defined in the last assembly there will be NO day class 02/06/2009 - Tuesday.
31/05	Provided the note of Exam 1
11/05	Available the statement of work 2
27/04	Work Page 1 updated with the abstracts received.
24/04	Updated the list of exercises with suggestions for exercises related to the review
16/04	Exam 1: 12/05
14/04	Updated list of suggested exercises (chap. 2 - 4th edition)
13/04	The class for tomorrow (Tuesday, 14/04) will be in room 85 of IC-02
06/04	There will be no class tomorrow (Tuesday, 05/04/2009)
17/03	Available the statement of work 1
04/03	Available the slides used in the first class (1 and 6 slides per page)
02/03	Recommended reading: Moore's Law

Review (pipelines, performance, cache and instruction set)

Fundamentals

Parallelism at instruction level (ILP)

Dynamic exploration

Software ILP

Project of Hierarchy of Memories

Multiprocessors and Thread Level Parallelism

Storage Systems

Lessons:

Chapter	Aula	Subject

	1^a.. 2^a.. 3^a.. 4^a..	Review	pdf 6-PDF

1	5^a..	Fundamentals	pdf 6-PDF

2-3	6^a.. 7^a.. 8^a.. 9^a.. 10^a.. 11^a.. 12^a.. 13^a.. 14^a..	Parallelism at instruction level (ILP)	pdf 6-PDF pdf 6-PDF pdf 6-PDF pdf 6-PDF



	18^a..	Exam I
5	15^a.. 16^a.. 17^a.. 19^a.. 20^a.. 21^a..	Project of Hierarchy of Memories	pdf 6-PDF





4	22^a.. 23^a.. 24^a.. 25^a..	Multiprocessors and Parallelism at Thread Level	pdf 6-PDF
6	26^a.. 27^a..	Storage Systems	pdf 6-PDF



		Exam II

	Holidays	09 to 11/04; 20/21 and 04/01; 02 and 05/11; 13/06/XNUMX
	Deadline for compliance with the Time Load: 04/07

Textbook:

“Computer Architecture: A Quantitative Approach” - 4th edition; Hennessy & Patterson

Class notes (transparencies )

Exercises:

It is strongly recommended that the problems encountered at the end of each chapter of the textbook be resolved. A substantial part of the exams will cover them.

(Suggestions):
NOTE: The number of exercises below is that found in
"Computer Architecture: A Quantitative Appoach" - 4rd edition

Chapter 1: 1.12 to 1.14
Chapter 2: 2.1 to 2.7; 2.9; 2.10; 12.11; 12.12 (ab);
Chapter 3:
Chapter 4:
Chapter 5:
Chapter 7:
Chapter 8:
Chapter 6:

-------------------------------------------------- -------------------------------------------------- -------------------------------------------------- -

NOTE: The number of exercises below is that found in
"Computer Architecture: A Quantitative Appoach" - 3rd edition

Chapter 1: 1.1 to 1.4; 1.6; 1.8; 1.10; 1.11; 1.13; 1.14; 1.16 to 1.18
Chapter 3: 3.1 to 3.3; 3.5; 3.8; 3.9; 3.14 to 3.17; 3.20; 3.21; 3.28
Chapter 4: 4.1; 4.2; 4.4; 4.5; 4.7; 4.12; 4.13; 4.16; 4.17; 4.19; 4.20; 4.23; 4.24
Chapter 5: 5.5.1; 5.6; 5.7; 5.13; 5.16 to 5.19
Chapter 7: 7.1; 7.3; 7.6 to 7.9; 7.21; 7.24
Chapter 8: 8.1 to 8.7; 8.9; 8.10; 8.14; 8.19; 8.31
Chapter 6: 6.1; 6.4; 6.5; 6.10; 6.13; 6.18; 6.20; 6.23

-------------------------------------------------- -------------------------------------------------- -------------------------------------------------- -

Suggested Exercises for Review:

(Computer Organization and Design - The Hardware / Software Interface - 3rd. Edition)

Chapter 4 (Performance): 4.1 - 4.3, 4.6 - 4.8, 4.10, 4.12, 4.14, 4.15
Chapter 6 (Pipeline): 6.1 - 6.4, 6.14, 6.17 - 6.19, 6.21 - 6.22, 6.33, 6.35 - 6.36
Chapter 7 (Memory Hierarchy): 7.1 - 7.5, 7.9 - 7.14, 7.28, 7.32- 7.35

The evaluation will be based on two exams and two papers.; Exam I (weight 3): 12/05 -- Notes; Exam II (weight 4): 07/07/2009 -- Notes
: Delivery of works: -
Work 1 (weight 1): -- Notes: Reservation: until 8:00 de 02/04/2009; Delivery: until 8:00 de 27/04/2009

Work 2 (weight 2):; Reservation: until 8:00 of 23/05/2009
Delivery fee: until 8:00 on 03/07/2009: Delivery Review: until 8:00 de 13/07/2009

(Feb 26, 2009)

MO401

Computer Architecture I

1S2009

Program:

Textbook:

Class notes (transparencies )

Recommended Reading:

G. MOORE, "Cramming More Components onto Integrated Circuits", Electronics,
p114-117, April 1965. (Reprinted at: Proc. of the IEEE, vol 86, no. 1)

Exercises:

It is strongly recommended that the problems encountered at the end of each chapter of the textbook be resolved. A substantial part of the exams will cover them.

Suggested Exercises for Review:

(Computer Organization and Design - The Hardware / Software Interface - 3rd. Edition)

Rating:

Exams: Concepts

MO401

Computer Architecture I

1S2009

Program:

Textbook:

Class notes (transparencies)

Recommended Reading:

G. MOORE, "Cramming More Components onto Integrated Circuits", Electronics, p114-117, April 1965. (Reprinted at: Proc. of the IEEE, vol 86, no. 1)

Exercises:

It is strongly recommended that the problems encountered at the end of each chapter of the textbook be resolved. A substantial part of the exams will cover them.

Suggested Exercises for Review:

(Computer Organization and Design - The Hardware / Software Interface - 3rd. Edition)

Rating:

Exams: Concepts

Class notes (transparencies )

G. MOORE, "Cramming More Components onto Integrated Circuits", Electronics,
p114-117, April 1965. (Reprinted at: Proc. of the IEEE, vol 86, no. 1)