mc 542
Computer Organization: Theory and Practice

classrooms	Project Manager	Evaluation	Exercises	Jobs	REFERENCES	Questions and answers	Calendar	Slides	Students	Notes

Contact Us

Teachers: Paulo Cesar Centoducatte (Email) - Room 11 - IC-1

OBS .: When sending an email please put in the subject "mc542"

Notices

Data	Notices
17/12	Available spreadsheet with exam grades
	Exam on 13/12/2007 at CB02 at 21:00
09/12	Available spreadsheet with the grades of the tests and assignments
03/12	Available spreadsheet with the notes of the second test
23/11	2a. Event will take place in room 316 (IC-3) on 30/11/2007 (Friday)
23/11	Marked on data project delivery
09/11	Groups for the execution of the project (updated 13/11)
09/11	The class of 09/11 (Friday) will be in room 316
08/12	Project: Send email with the group members until 12/11/2007
06/11	Updated the text of the project (in the entity the sign AluOutM was declared twice)
02/11	Delivery report Lab03
01/11	Provided the statement of the Project
27/10	When submitting Exercise 3, place it in the subject lab3
26/10	The class of 26/10 (Friday) will start in room 316
25/10	Available spreadsheet with the notes of the first test
24/10	Available spreadsheet with the points (not yet rated, yet) obtained in the first test
17/10	Link available for the simulator SPIM
17/10	Provided the statement of the Exercise 3
16/10	Delivery report Lab02 (updated 18/10)
05/10	Description of various conversion functions ( pdf )
05/10	Delivery report Lab01
04/10	Provided the statement of the Exercise 2
28/09	Example of scripts and a testbench using files
21/09	Provided the statement of the Exercise 1
14/09	In the directory Control there are two .vhd files that will be used as an example of using the ghdl and gtkwave tools and in Docs / usage-ghdl.txt a short text with the commands to analyze, elaborate, execute (simulate) and observe the waveforms generated during the simulation of the example
14/09	The class of 14/09 (Friday) will start in room 316 (+/- 20min) and then will be in the labs
30/08	The class of 31/08/2007 (Friday) will be in room 85 in IC-02
07/08	Em Slides you can find pdf files in versions 1 and 6 slides per page
02/08	Class of 03/08 will be in room 316 (IC3)

classrooms

Classes A and B
Tuesday: 19:00 - 21:00 - Room: CB02
Thursdays: 21:00 - 23:00 - Room: CB02
Fridays: 19:00 - 21:00 - Room: 316 or
CC02-CC03 (IC-03)

Project Manager

Professor:

Paulo C. Centoducatte: Sala 11

Evaluation

Race 1 (P1): Weight 4 11/10/2007

Race 2 (P2): Weight 6 30/11/2007

Exercises (Hey)
Project (Prj)
MP -- Average of Tests P1 and P2
MTP -- Average of Exercises and Project
MMC542 -- Weighted Average in MC542 Course
Ex - Final Exam Note
NF - Final grade

MP = (4P1 + 6P2) / 10

$\ begin {displaymath} M_ {TP} = \ frac {\ frac {\ sum_ {1} ^ {n} E_ {i}} {n} + Prj} {2} \ end {displaymath}$

$\ begin {displaymath} M_ {MC542} = \ left \ {\ begin {array} {ll} \ frac {8 M_ {P} + 2 M _ {... ...}; M_ {TP}) & case \ : contr \ acute {a} rio \ end {array} \ right. \ end {displaymath}$

invoice = MMC542 se MMC542 Bigger or equal a 5,0

invoice = (MMC542 + EX) / 2 if the student is
with weighted average (MMC542) less
that 5,0 and has frequency greater or
equal to 75%.

Jobs

Students should do a series of Practical Exercises and a Project in the semester:

Exercise 1: pdf

Delivery: until 8:00 on 01/10/2007

Exercise 2: pdf

Delivery: until 8:00 on 15/10/2007

Exercise 3: pdf

Delivery: until 8:00 on 29/10/2007

Project 1: pdf

Delivery: until 8:00 on 04/12/2007

The practical exercises and the project must be delivered in the indicated date.

OBS .: The work delivered up to 24 hours after indicated period will not suffer penalty. After this period of need, only the work delivered up to 72 hours after the deadline will be accepted indicated, for which there will be a penalty of 30% maximum value.

Recommended VHDL and project documents:

Altera: Recommended HDL Coding Styles

Actel HDL Coding Style Guide

The Ten Commandments of Excellent Design

The Ten Commandments of Excellent Design VHDL Code Examples

Recommended Exercises

Digital Design and Computer Architecture

Chapter 1: 1.4; 1.6 to 1.13; 1.15 to 1.17; 1.19; 1.21; 1.25 to 1.31; 1.33 to 1.36; 1.39; 1.41; 1.42; 1.48 to 1.51; 1.60 to 1.63
Chapter 2: 2.1 to 2.3; 2.7 to 2.9; 2.12 to 2.18; 2.21; 2.24 to 2.26; 2.28 to 2.30; 2.32
Chapter 3: 3.1 to 3.7; 3.9 to 3.12; 3.15 to 3.17; 3.19 to 3.21
Chapter 5: 5.1, 5.3; 5.8; 5.18; 5.20 to 5.29; 5.36 to 5.39; 5.45
Chapter 6: 6.1 to 6.4; 6.8; 6.9; 6.11; 6.12; 6.14; 6.24 to 6.26
Chapter 7: 7.1; 7.3 to 7.6; 7.8; 7.9; 7.12; 7.13; 7.24 to 7.29
Chapter 8: 8.1 to 8.12; 8.15 to 8.21

Fundamentals of Digital Logic with VHDL Design

Chapter 2: 2.1 to 2.27

Chapter 3: 3.1 to 3.13

Chapter 4: 4.1 to 4.20

Chapter 5: 5.1 to 5.10

Chapter 6: 6.1 to 6.17

Chapter 7: 7.1 to 7.24 (skipping VHDL exercises)

Chapter 8: Skip the VHDL

Computer Organization & Design, The Hardware / Software Interface.

Chapter 2: 2.1 to 2.5; 2.10 to 1.13; 2.15 to 2.22; 2.32; 2.44
Chapter 3: 3.1 to 3.6; 3.9; 3.12; 3.16; 3.20;
Cachapter 4: 4.1 to 4.6; 4.13; 4.17; 4.21; 4.23; 4.25 to 4.28; 4.32; 4.33; 4.40; 4.41; 4.43; 4.44; 4.50; 4.53; 4.57
Cachapter 5: 5.1; 5.4; 5.5 to 5.15; 5.17; 5.18; 5.20; 5.21; 5.22; 5.26
Chapter 6: 6.1 to 6.4; 6.7; 6.8; 6.11 to 6.16; 6.19 to 6.26; 6.28 to 6.31
Chapter 7: 7.1 to 7.23; 7.25 to 7.30; 7.32; 7.33; 7.35; 7.36

REFERENCES

Menus

Theory: Basic notions about logic circuits. Memories, central processing units. Addressing, bus, interruption, communications, interfaces and peripherals. Typical computers.
Practice: Digital design methodology. Design techniques using programmable logic. Electrical features of digital circuits. VHDL Language Concepts. Design and implementation of combinational logic (decoders, selectors, etc.). Design and implementation of sequential logic (Flip-flops, Accountants, etc.). Arithmetic circuits. Memories. Design and implementation of a cpu.

Main References

David Harris and Sarah Harris. Digital Design and Computer Architecture. Morgan Kaufmann. ISBN: 978-0-12-370497-9

Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with VHDL Design. McGraw-Hill.
David A. Patterson & John L. Hennessy. Computer Organization & Design, The Hardware / Software Interface. Third Edition. Morgan Kaufmann.
David A. Patterson & John L. Hennessy. Computer Organization and Design. The Hardware / Software Interface. Third Edition.

Peter J. Ashenden. The VHDL Cookbook.
Actel HDL Coding Style Guide

Other References

M. Morris Mano and Charles R. Kime. Logic and Computer Design Fundamentals🇧🇷 Printece Hall.

John F. Wakerly. Digital Design: Principles & Pratices (second Edition)🇧🇷 Printece Hall.

Herbert Taub. Digital Circuits and Microprocessors. McGraw-Hill.

John P. Uyemura. Digital Systems an integrated approach. Thomson Pioneer.

Mehdi R. Zargham. Computer Architecture: Single and Parallel Systems🇧🇷 Printice Hall.

John P. Hayes. Computer Architecture and Organization. McGraw-Hill Series in Computer Organization and Architecture.

Fredrick J. Hill & Gerald R. Peterson. Digital Logic and Microprocessors. John Wiley & Sons.

Douglas V Hall. Digital Circuits and Systems. McGraw-Hill - Electronic Engineering Series.

Albert P. Malvino. Microcomputers and Microprocessors. Makron.

John L. Hennessy & David A. Patterson. Computer Architecture. The Quantitative Approach. Second Edition. Morgan Kaufmann

Course Program

David M. Harris and Sarah L. Harris. Digital Design and Computer Architecture.Morgan Kaufmann

Chapter 1:
Chapter 2:
Chapter 3:
Chapter 4:
Chapter 5: The VHDL part
Chapter 6:
Chapter 7:
Chapter 8:

Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with VHDL Design. mcgraw-hil

Chapter 1: Read only
Chapter 2: 2.1-2.7, 2.9.

Chapter 3: 3.1-3.3, 3.8.1, 3.8.3-3.9

Chapter 4: 4.1-4.6, 4.12

Chapter 5: 5.1-5.7

Chapter 6: 6.1-6.6

Chapter 7: 7.1-7.13

Chapter 8: 8.1-8.7
Chapter 9: 9.

David A. Patterson and John L. Hennessy. Computer Organization Design, The Hardware / Software Interface.Morgan Kaufmann

Chapter 1: Read only

Chapter 2: 2.1-2.5 (2.8 and 2.9 - reading)

Chapter 3: 3.1-3.8 (3.9 - reading)

Chapter 4: 4.1-4.8 (does not include the part already seen in logic circuits)

Chapter 5: 5.1-5.6
Chapter 6: 6.1-6.7 (6.8 - reading)
Chapter 7: 7.1-7.5
Chapter 8: 8.1-8.6

Useful links

Altera homepage.

Homepage of the Altera University Program.
Page for obtaining the Altera license
The VHDL Cookbook
Actel HDL Coding Style Guide
GHDL e GTKWAVE (some linux distributions have gtkwave)
SPIM - MIPS simulator
Various simulators and tutorials

Calendar

Day	Matter
August
02/08 (01^a.)	Presentation of the Course; Number Systems (pdf)
03/08 (02^a.)	Number Systems (cont.); Logic doors, Technology (pdf)
07/08 (03^a.)	Technology (cont.)
09/08 (04^a.)	Technology (cont.); Combinational Circuits Project (pdf)
10/08 (05^a.)	Combinational Circuits Project (cont.)
14/08 (06^a.)	Combinational Circuits Project (cont.)
16/08 (07^a.)	Combinational Circuits Project (cont.)
17/08 (08^a.)	Combinational Circuits Project (cont.); Sequential Circuits (pdf)
21/08 (09^a.)	Sequential Circuits; registrars; accountants
23/08 (10^a.)	Finite State Machinery Project (pdf)
24/08 (11^a.)	Finite State Machine Design (cont.)
28/08 (12^a.)	Elimination of Redundant States (pdf); Example WSF project
30/08 (13^a.)	Introduction to VHDL (pdf)
31/08 (14^a.)	Introduction to VHDL (cont.)
September
Day	Matter
04/09 (15^a.)	Introduction to VHDL (cont.)
06/09 (16^a.)	Debt Class
07/09	There will be no classes.
11/09 (17^a.)	Introduction to VHDL (cont.): Scope, components, configuration, pakage (pdf)
13/09 (18^a.)	Introduction to VHDL (cont.): Basic blocks, generate; FFs, registrars, FSM (pdf e pdf)
14/09 (19^a.)	Using ghdl and gtkwave
18/09 (20^a.)	ALU, Multiplier, Divider, ... (pdf)
20/09 (21^a.)	Floating point hardware, memory
21/09 (22^a.)	Laboratory Class: Exercise 1
25/09 (23^a.)	Instruction Set (ISA) (pdf)
27/09 (24^a.)	Instruction set (ISA)
28/09 (25^a.)	Laboratory Class
October
Day	Matter
02/10 (26^a.)	Instruction set (ISA)
04/10 (27^a.)	Instruction set (ISA)
05/10 (28^a.)	Performance (pdf), MIPS Single-Cycle (pdf)
09/10	Evaluation and discussion of courses (there will be no class)
11/10 (29^a.)	Race 1 (Thursday)
12/10	There will be no classes.
16/10 (30^a.)	Single-Cycle MIPS (cont'd)
18/10 (31^a.)	MIPS MultiCycle; Pipelined Mips (pdf)
19/10 (32^a.)	Laboratory Class: Exercise 3
23/10 (33^a.)	Pipelined Mips (cont.)
25/10 (34^a.)	Pipelined Mips (cont.)
26/10 (35^a.)	Correction of the first race
30/10 (36^a.)	Memory Systems (pdf)
November
Day	Matter
01/11 (37^a.)	Memory Systems (cont.)
02/11	There will be no classes.
06/11 (38^a.)	Memory Systems (cont.)
08/11 (39^a.)	Memory Systems - Virtual Memory (pdf)
09/11 (40^a.)	Virtual Memory (cont.)
13/11 (41^a.)	Advanced Architectures (pdf)
15/11	There will be no classes.
16/11	There will be no classes.
20/11	There will be no classes.
22/11 (42^a.)	Advanced Architectures (pdf) (algorithm of tomasulo)
23/11 (43^a.)	Laboratory Class
27/11 (44^a.)	Dedicated lesson.
29/11 (45^a.)	Dedicated lesson.
30/11 (46^a.)	Race 2 (Friday)
December
Day	Matter
01/12	Deadline for compliance with the Time Load
03 to 07 / 12	Study week.
10 to 15 / 12	Final exams of the 2nd term
13/12	Examination


Other Important School Calendar Dates
08 / 08 the 01 / 10	Withdrawal from enrollment in the 2nd semester of 2007.
26/27 and 09/XNUMX	2007 Scientific Initiation Congress.
17 to 21 / 09	Registration for proficiency test, only for foreign languages.
28/09	Disclosure of the registration results for the proficiency test - foreign languages.
01/10	The last day to withdraw from enrollment in the 2nd semester of 2007.
08/10	Application of the proficiency test, only for foreign languages.
09/10	Evaluation and discussion of courses - at the time of the meeting, students will be excused from classes.
Important dates of graduation calendar.
Holidays
07 and 08/09; 12 and 13/10; 02 and 03/11; 15/20 to 11/XNUMX

mc 542 Computer Organization: Theory and Practice

Contact Us

mc 542
Computer Organization: Theory and Practice