10August2026
14:00 Doctoral defense room 85 of IC2
Topic on
OMPC-F: Multi-FPGA Programming Using OpenMP
Student
Pedro Henrique Di Francia Rosso
Advisor / Teacher
Guido Costa Souza de Araujo
Brief summary
The development of high-performance scientific applications has become a complex task, as traditional CPUs are no longer sufficient to meet the growing demands for performance and energy efficiency. This scenario has driven the adoption of heterogeneous architectures based on accelerators such as GPUs (Graphics Processing Units) and FPGAs (Field-Programmable Gate Arrays). However, efficiently integrating and programming multiple accelerators in distributed clusters remains a complex challenge. In the case of FPGAs, in addition to mastering the application's writing language (such as C/C++), the developer needs to master execution support libraries (such as AMD's XRT or Intel's SYCL). Additionally, if the focus is on distributed environments, yet another stack of communication tools is added. This thesis presents a solution focused on FPGAs based on the OMPC (OpenMP Cluster) framework, extending the standard OpenMP model to abstract the complexity of heterogeneous and distributed environments. The first contribution introduces transparent offloading for FPGAs, allowing developers to switch kernels between CPUs, GPUs, and FPGAs with just a few lines of code. The second contribution introduces support for streaming-based computing in the framework, enabling the creation of efficient data pipelines in FPGAs by synthesizing streams as OpenMP buffers from the kernel binaries. The proposed framework also simplifies the integration of software (OpenMP) and hardware (FPGA) compilation processes by keeping them separate, linking the binaries only during execution. Finally, the solution allows for the automatic integration of two accelerated communication libraries in FPGAs, focusing on data vector transfer and streaming channels between kernel instances on the same or different FPGAs. The proposals were evaluated using synthetic benchmarks, real-world applications, and software metrics. The results demonstrate that the approach reduces programming effort by up to 59% compared to the model with traditional tools (XRT and MPI). Furthermore, the framework outperformed the standard communication mechanism used in OMPC (MPI) by up to 1,41x in applications heavily constrained by communication. The framework is also the first to include support for data streaming between FPGA kernels in its programming model. The OpenMP code remains fully compatible with models that utilize both streaming and in-memory vectors, since streaming support is fully abstracted, leaving the framework to decide the ideal mechanism based on what is implemented in the FPGA. Tests against the traditional XRT+MPI model demonstrated that the solution maintains scalability with an average constant overhead of only 4,3%.
Examination Board
Headlines:
| Guido Costa Souza de Araújo | IC / UNICAMP |
| Calebe de Paula Bianchini | MACKENZIE |
| Fernando Gehm Moraes | PUCRS |
| Ricardo Pannain | IC / UNICAMP |
| Luiz Eduardo Busato | IC / UNICAMP |
Substitutes:
| Isaias Bittencourt Felzmann | IC / UNICAMP |
| Alfredo Goldman vel Lejbman | IME / USP |
| Samuel Xavier de Souza | DCA / UFRN |