@techreport{TR-IC-07-27,
  number = {IC-07-27},
  author = {Rafael Fernandes Batistella and
            Ricardo Ribeiro dos Santos and
            Rodolfo Jardim de Azevedo},
  title = {A New Technique for Instruction Encoding in
           High Performance Architectures},
  month = {September},
  year = {2007}, 
  institution = {Institute of Computing, University of Campinas},
  note = {In English, 18 pages.
    \par\selectlanguage{english}\textbf{Abstract}
        In this paper we propose a new technique to reduce the program
        footprint and the instruction fetch latency in high
        performance architectures adopting long instruction in the
        memory. Our technique is based on an algorithm that factors
        long instructions into encoded instructions and instruction
        patterns. An encoded instruction contains no redundant data
        and it is stored into an I-cache. The instruction patterns, on
        the other hand, look like a map to the decode logic to prepare
        the instruction to be executed in the execution stages. These
        patterns are stored into a new cache, named Pattern cache
        (P-cache). The technique has shown a suitable alternative to
        well-known architectural styles such as VLIW and EPIC
        architectures. We have carried out a case study of this
        technique in a high performance architecture called
        2D-VLIW. We have evaluated the performance ofour encoding
        technique through trace-driven experiments with MediaBench,
        SPECint00, and SPECfp programs. Moreover, we have compared the
        execution time performance of the 2D-VLIW architecture with
        encoded instructions to the same architecture with non-encoded
        instructions. Further experiments compare our approach to VLIW
        and EPIC instruction encoding techniques. Experimental results
        reveal that our encoding strategy provides a program execution
        time that is up to 23x (average of 5x) faster than a 2D-VLIW
        non-encoded program. The results also show that the program
        code region, by using encoded instructions, is up to 78        (average of 69        using non-encoded instructions.
  }
}