@techreport{TR-IC-00-01,
  number = {IC-00-01},
  author = {Guido  Araújo  and Paulo Centoducatte and Rodolfo Azevedo and Ricardo Pannain},
  title = {Expression Tree Based Algorithms for Code Compression on Embedded {RISC} Architectures},
  month = {January},
  year = {2000}, 
  institution = {Institute of Computing, University of Campinas},
  note = {In English, 27 pages.
    \par\selectlanguage{english}\textbf{Abstract}
      Reducing program size has become an important goal in the design
      of modern embedded systems target to mass production. This
      problem has driven a number of efforts aimed at designing
      processors with shorter instruction formats (e.g. ARM Thumb and
      MIPS16), or that are able to execute compressed code (e.g. IBM
      CodePack PowerPC). This paper proposes three code compression
      algorithms for embedded RISC architectures. In all algorithms,
      the encoded symbols are extracted from program expression trees.
      The algorithms differ on the granularity of the encoded symbol,
      which are selected from whole trees, parts of trees or single
      instructions. Dictionary based decompression engines are
      proposed for each compression algorithm. Experimental results,
      based on SPEC CINT95 programs running on the MIPS R4000
      processor, reveal an average compression ratio of 53.6{\%}
      (31.5{\%}) if the area of the decompression engine is (not)
      considered.
  }
}