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Palestra: The A to Z of SoCs.

Prof. Reinaldo Bergamaschi, Prof. Visitante do Instituto de Computação, na Série de Seminários 2009 da Pós-Graduação, dia 18/09/2009, às 14:00 h, Auditório do IC , Sala 85 - IC 2.

What Palestra
When 18/09/2009
from 14:00 to 15:00
Where Auditório do IC - Sala 85 - IC 2
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The exploding complexity of new chips and the ever decreasing
time-to-market window are forcing fundamental changes in the way
systems are designed. The advent of Systems-on-Chip (SoC) based
on pre-designed intellectual-property (IP) cores has become an
absolute necessity for embedded systems companies to remain
competitive. Designing an SoC, however, is extremely complex, as
it encompasses a range of difficult problems in hardware and
software design. On the hardware side, an SoC can be seen as a
very large application specific integrated circuit (ASIC)
comprisingcomplex cores, memory blocks, custom logic and
mixed-signal circuits. This combination of diverse blocks in a
very large chip transforms the  usual problems of synthesis,
timing and layout (found in ASIC design) into significantly more
complex issues of  synthesis capacity, timing correction,
wireability, power, etc. Moreover, there are significant
challenges in integrating diverse components such as mixed-signal,
digital and memory blocks.
On the software side, designing an SoC requires careful analysis
of the application software requirements, coupled with the
characteristics of the real-time operating system and the
hardware-software interface (device drivers). The tight
interaction of hardware and software in SoCs causes unique design
and verification problems which demand specialized methodology,
tools and techniques.
This presentation will cover a wide range of SoC issues including
market drivers and trends, technology and integration aspects,
early architecture definition, methodology, hardware and software
design and verification techniques. Among the topics covered are:
- Technical and market issues that lead to the development of
system-on-chip technologies
- Problems in integrating diverse technologies such as mixed-signal,
memories and digital components
- Current approaches for SoC design using cores and platforms
- SoC Design Methodology
- Architectural design issues
- Performance Analysis of SoCs
- Hardware design
- Embedded Software design
- Verification issues

OBS: A palestra será ministrada em português, com slides em inglês.

Instituto de Computação :: Universidade Estadual de Campinas
Av. Albert Einstein, 1251 - Cidade Universitária • CEP 13083-852 • Campinas/SP - Brasil • Fone: [19] 3521-5838